1. Field of the Invention
This invention relates to a semiconductor device and its manufacturing method, specifically to a formation of bump electrode.
2. Description of the Related Art
FIGS. 14A and 14B show a cross-sectional view and a schematic plan view, respectively, of a conventional bump electrode structure.
The reference numeral 1 indicates a semiconductor substrate, on which an insulating film 2 made of a LOCOS oxide film is disposed. A lower wiring layer 3 is placed on the insulating film 2.
An interlayer insulating film 4 is formed to cover the lower wiring layer 3. An upper wiring layer 6 is formed on the interlayer insulating film 4 and makes contact with the lower wiring layer 3 through via holes 5 formed in the interlayer insulating film 4. A via hole is a contact hole connecting two wiring layers.
A passivation film 7 is disposed to cover the upper wiring layer 6 and a gold bump electrode 8 is placed at a pad portion 7A, which is formed by making an opening in the passivation film 7. FIG. 14A is a cross sectional view of a bump electrode structure shown in FIG. 14B cut along line Axe2x80x94A in FIG. 14B. FIG. 14B is a schematic plan view showing a configuration of the lower wiring layer 3, the upper wiring layer 6, the pad portion 7A and the gold bump electrode 8, omitting the passivation film 7 and the interlayer insulation film 4 for the sake of simplicity.
The invention provides a semiconductor device including a semiconductor substrate and a passivation film formed on the semiconductor substrate and having a plurality of openings. A conductive material fills in each of the openings. The device also includes a bump electrode making contact with conductive material and covering all the openings.
The invention also provides a semiconductor device including a gate oxide film disposed on a semiconductor substrate and a gate electrode disposed on the gate oxide film. A source layer and a drain layer are each disposed adjacent to the gate electrode. A semiconductor layer is disposed underneath the gate electrode and forms a channel. The device also includes a lower wiring layer making contact with the source layer and the drain layer, an insulating film covering the lower wiring layer, and an upper wiring layer making contact with the lower wiring layer through a via hole formed in the insulating film. A passivation film covers the upper wiring layer and has a plurality of openings. A conductive material fills in each of the openings. The device also includes a bump electrode making contact with conductive material and covering all the openings.
The invention further provides a manufacturing method of semiconductor device including providing a semiconductor substrate and forming an insulating film on the semiconductor substrate. This is followed by forming a wiring layer on the insulating film, forming a passivation film covering the wiring layer, and forming a plurality of openings in the passivation film. The method also includes filling the openings with a conductive material, and forming a bump electrode making contact with conductive material and covering all the openings.
The invention also provides a manufacturing method of semiconductor device including providing a semiconductor substrate of a first conductivity type and forming a gate oxide film on the semiconductor substrate. This is followed by forming a first source layer and a first drain layer each having a second conductivity type, and forming a layer of the second conductivity type connecting the first source layer and the first drain layer. The method also includes forming a second source layer of the second conductivity type in the first source layer and forming a second drain layer of the second conductivity type in the first drain layer. The impurity concentration of the second source and second drain layers is higher than the impurity concentration of the first source and first drain layers. The method further includes forming a body layer of the first conductivity type in an area for the gate electrode formation so that the body layer penetrates the layer of the second conductivity type connecting the first source layer and the first drain layer. This is followed by forming a gate electrode in the area for the gate electrode formation, forming a first insulating film on the gate electrode, and forming a lower wiring layer on the first insulating film. The lower wiring layer makes contact with the second source layer and the second drain layer through the first insulating film. The method also includes forming a second insulating film on the lower wiring layer, forming a via hole in the second insulating film, and forming an upper wiring layer on the second insulating film. The upper wiring layer makes contact with the lower wiring layer through the second insulating film while the via hole of the second insulating film provides a conduit between the upper and lower wiring layers. The method further includes forming a passivation film on the upper wiring layer, and forming a plurality of openings in the passivation film. The method also includes filling the openings with a conductive material, and forming a bump electrode making contact with conductive material 10 and covering all the openings.